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FEATURES
POWER MANAGER High Efficiency Switching PowerPathTM Controller with Bat-TrackTM Adaptive Output Control Programmable USB or Wall Current Limit (100mA/500mA/1A) Full Featured Li-Ion/Polymer Battery Charger 1.5A Maximum Charge Current Internal 180m Ideal Diode + External Ideal Diode Controller Powers Load in Battery Mode Low No-Load Quiescent Current when Powered from BAT (<30A) DC/DCs Triple High Efficiency Step-Down DC/DCs (1A/400mA/400mA IOUT) All Regulators Operate at 2.25MHz Dynamic Voltage Scaling on Two Outputs I2C or Independent Enable, V OUT Controls Low No-Load Quiescent Current: 20A 28-Pin (4mm x 5mm x 0.75mm) QFN Surface Mount Package
LTC3555 High Efficiency USB Power Manager + Triple Step-Down DC/DC DESCRIPTION
The LTC(R)3555 is a highly integrated power management and battery charger IC for Li-Ion/Polymer battery applications. It includes a high efficiency current limited switching PowerPath manager with automatic load prioritization, a battery charger, an ideal diode and three general purpose synchronous step-down switching regulators. Designed specifically for USB applications, the LTC3555's switching power manager automatically limits input current to a maximum of either 100mA or 500mA for USB applications or 1A for adapter-powered applications. Unlike linear PowerPath controllers, the LTC3555's switching input stage transmits nearly all of the 2.5W available from the USB port to the system load with minimal power wasted as heat. This feature allows the LTC3555 to provide more power to the application and eases the constraint of thermal budgeting in small spaces. Two of the three general purpose switching regulators can provide up to 400mA and the third can deliver 1A. The entire product can be controlled via I2C or simple I/O. The LTC3555 is available in the 28-pin (4mm x 5mm x 0.75mm) QFN surface mount package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. PowerPath and Bat-Track are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6522118 and 6404251
APPLICATIONS

HDD-Based MP3 Players, PDAs, GPS, PMPs Other USB-Based Handheld Products
TYPICAL APPLICATION
High Efficiency PowerPath Manager and Triple Step-Down Regulator
USB/WALL 4.35V TO 5.5V USB COMPLIANT STEP-DOWN REGULATOR CC/CV BATTERY CHARGER CHARGE T LTC3555 ALWAYS ON LDO TRIPLE HIGH EFFICIENCY STEP-DOWN SWITCHING REGULATORS I2C PORT 1 2 3 3.3V/25mA 0.8V TO 3.6V/400mA 0.8V TO 3.6V/400mA 0.8V TO 3.6V/1A RST 2 RTC/LOW POWER LOGIC MEMORY I/O CORE PROCESSOR I2C
3555 TA01
TO OTHER LOADS
Switching Regulator Efficiency to System Load (POUT/PBUS)
100 90 80
0V
OPTIONAL EFFICIENCY (%)
70 60 50 40 30 20 10
BAT = 4.2V BAT = 3.3V
+
Li-Ion
ENABLE CONTROLS
5
0 0.01
VBUS = 5V IBAT = 0mA 10x MODE 0.1 IOUT (A) 1
3555 TA01b
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LTC3555 ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2, 3)
PACKAGE/ORDER INFORMATION
TOP VIEW ILIM1 ILIM0 VBUS VOUT EN3 BAT 22 GATE 21 CHRG 20 PROG 29 19 FB1 18 VIN1 17 SW1 16 EN1 15 RST3 9 10 11 12 13 14 VIN3 SW3 SDA SCL FB3 SW 28 27 26 25 24 23 LDO3V3 1 CLPROG 2 NTC 3 FB2 4 VIN2 5 SW2 6 EN2 7 DVCC 8
VBUS (Transient) t < 1ms, Duty Cycle < 1% .......................................... -0.3V to 7V VIN1, VIN2, VIN3, VBUS (Static), DVCC, FB1, FB2, FB3, NTC, BAT, EN1, EN2, EN3, ILIM0, ILIM1, SCL, SDA, RST3, CHRG............ -0.3V to 6V ICLPROG ....................................................................3mA IRST3, ICHRG ............................................................50mA IPROG ........................................................................2mA ILDO3V3 ...................................................................30mA ISW1, ISW2 ............................................................600mA ISW, ISW3, IBAT, IVOUT ...................................................2A Junction Temperature ........................................... 125C Operating Temperature Range ................. -40C to 85C Storage Temperature Range................... -65C to 125C
UFD PACKAGE 28-LEAD (4mm x 5mm) PLASTIC QFN TJMAX = 125C, JA = 37C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC3555EUFD
UFD PART MARKING 3555
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL VBUS IBUSLIM PARAMETER Input Supply Voltage Total Input Current PowerPath Switching Regulator
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k, unless otherwise noted.
CONDITIONS MIN 4.35 1x Mode, VOUT = BAT 5x Mode, VOUT = BAT 10x Mode, VOUT = BAT Suspend Mode, VOUT = BAT 1x Mode, IOUT = 0mA 5x Mode, IOUT = 0mA 10x Mode, IOUT = 0mA Suspend Mode, IOUT = 0mA 1x Mode 5x Mode 10x Mode Suspend Mode 1x Mode, BAT = 3.3V 5x Mode, BAT = 3.3V 10x Mode, BAT = 3.3V Suspend Mode

TYP
MAX 5.5
UNITS V mA mA mA mA mA mA mA mA mA/mA mA/mA mA/mA mA/mA mA mA mA mA
87 436 800 0.31
IVBUSQ
VBUS Quiescent Current
hCLPROG (Note 4)
Ratio of Measured VBUS Current to CLPROG Program Current
IOUT(POWERPATH)
VOUT Current Available Before Loading BAT
95 460 860 0.38 7 15 15 0.044 224 1133 2140 11.3 135 672 1251 0.32
100 500 1000 0.50
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LTC3555 ELECTRICAL CHARACTERISTICS
SYMBOL VCLPROG VUVLO_VBUS VUVLO_VBUS-BAT VOUT PARAMETER CLPROG Servo Voltage in Current Limit VBUS Undervoltage Lockout VBUS to BAT Differential Undervoltage Lockout VOUT Voltage
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k, unless otherwise noted.
CONDITIONS 1x, 5x, 10x Modes Suspend Mode Rising Threshold Falling Threshold Rising Threshold Falling Threshold 1x, 5x, 10x Modes, 0V < BAT < 4.2V, IOUT = 0mA, Battery Charger Off USB Suspend Mode, IOUT = 250A MIN TYP 1.188 100 4.30 4.00 200 50 BAT + 0.3 4.6 2.25 0.18 0.30 1x, 5x Modes 10x 4.179 4.165 980 185 2 2 3 4.200 4.200 1022 204 3.5 27 1.000 0.100 100 1022 BAT < VTRKL BAT Rising Threshold Voltage Relative to VFLOAT Timer Starts when BAT = VFLOAT BAT < VTRKL (Note 5) ICHRG = 5mA VCHRG = 5V 0.18 110 2.7 -75 3.3 0.42 0.088 100 2.85 135 -100 4 0.5 0.1 65 -125 5 0.63 0.112 100 1 3.0 4.221 4.235 1065 223 5 38 MAX UNITS V mV V V mV mV V V MHz A A V V mA mA A A V V mV mA/mA mA V mV mV Hour Hour mA/mA mV A C
4.35
3.95
3.4 4.5 1.8
4.7 4.7 2.7
fOSC
Switching Frequency
RPMOS_POWERPATH PMOS On Resistance RNMOS_POWERPATH NMOS On Resistance IPEAK_POWERPATH Battery Charger VFLOAT ICHG IBAT VPROG VPROG_TRKL VC/10 hPROG ITRKL VTRKL VTRKL VRECHRG tTERM tBADBAT hC/10 VCHRG ICHRG RON_CHG TLIM BAT Regulated Output Voltage Constant Current Mode Charge Current Battery Drain Current PROG Pin Servo Voltage PROG Pin Servo Voltage in Trickle Charge C/10 Threshold Voltage at PROG Ratio of IBAT to PROG Pin Current Trickle Charge Current Trickle Charge Threshold Voltage Trickle Charge Hysteresis Voltage Recharge Battery Threshold Voltage Safety Timer Termination Bad Battery Termination Time End of Charge Indication Currrent Ratio CHRG Pin Output Low Voltage CHRG Pin Leakage Current Battery Charger Power FET On Resistance (Between VOUT and BAT) Junction Temperature in Constant Temperature Mode BAT < VTRKL RPROG = 1k RPROG = 5k VBUS > VUVLO, Battery Charger Off, IOUT = 0A VBUS = 0V, IOUT = 0A (Ideal Diode Mode)
Peak Switch Current Limit
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LTC3555 ELECTRICAL CHARACTERISTICS
SYMBOL NTC VCOLD VHOT VDIS INTC Ideal Diode VFWD RDROPOUT IMAX_DIODE VLDO3V3 RCL_LDO3V3 ROL_LDO3V3 VIL VIH IPD1 I2C Port DVCC IDVCC VDVCC_UVLO ADDRESS VIH, SDA, SCL VIL, SDA, SCL IPD2 SDA, SCL VOL fSCL tBUF tHD_STA tSU_STA tSU_STD tHD_DAT(OUT) tHD_DAT(IN) tSU_DAT tLOW Input Supply Voltage DVCC Current DVCC UVLO I2C Address Input High Threshold Input Low Threshold Pull-Down Current Digital Output Low (SDA) Clock Operating Frequency Bus Free Time Between Stop and Start Condition Hold Time After (Repeated) Start Condition Repeated Start Condition Setup Time Stop Condition Time Data Hold Time Input Data Hold Time Data Setup Time Clock Low Period IPULLUP = 3mA 400 1.3 0.6 0.6 0.6 225 0 100 1.3 900 70 30 2 0.4 SCL/SDA = 0kHz 1.6 0.5 1.0 0001 001[0] %DVCC %DVCC A V kHz s s s s ns ns ns s
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The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k, unless otherwise noted.
PARAMETER Cold Temperature Fault Threshold Voltage Hot Temperature Fault Threshold Voltage NTC Disable Threshold Voltage NTC Leakage Current Forward Voltage CONDITIONS Rising Threshold Hysteresis Rising Threshold Hysteresis Falling Threshold Hysteresis VNTC = VBUS = 5V MIN 75.0 33.4 0.7 -50 2 15 0.18 1.6 0mA < ILDO3V3 < 25mA 3.1 3.3 4 23 0.4 1.2 2 3.5 TYP 76.5 1.5 34.9 1.5 1.7 50 MAX 78.0 36.4 2.7 50 UNITS %VBUS %VBUS %VBUS %VBUS %VBUS mV nA mV mV A V V V A
VBUS = 0V, IOUT = 10mA IOUT = 10mA Internal Diode On Resistance, Dropout VBUS = 0V Internal Diode Current Limit Regulated Output Voltage Closed-Loop Output Resistance Dropout Output Resistance Logic Low Input Voltage Logic High Input Voltage ILIM0, ILIM1, EN1, EN2, EN3 Pull-Down Currents
Always On 3.3V LDO Supply
Logic (ILIM0, ILIM1, EN1, EN2, EN3)
5.5
V A V
4
LTC3555 ELECTRICAL CHARACTERISTICS
SYMBOL tHIGH tf tr tSP VIN1,2,3 VOUTUVLO PARAMETER Clock High Period Clock Data Fall Time Clock Data Rise Time Spike Suppression Time Input Supply Voltage VOUT UVLO--VOUT Falling VOUT UVLO--VOUT Rising Oscillator Frequency FBx Input Current Maximum Duty Cycle SWx Pull-Down in Shutdown Pulse Skip Mode Input Current Burst Mode Input Current Forced Burst Mode(R) Input Current LDO Mode Input Current Shutdown Input Current PMOS Switch Current Limit Available Output Current IOUT1 = 0A (Note 6) IOUT1 = 0A (Note 6) IOUT1 = 0A (Note 6) IOUT1 = 0A (Note 6) IOUT1 = 0A, FB1 = 0V Pulse Skip/Burst Mode Operation Pulse Skip/Burst Mode Operation (GBNT) Forced Burst Mode Operation (GBNT) LDO Mode (GBNT) (Note 7) VFB1,2,3 = 0.85V VIN1,2,3 Connected to VOUT Through Low Impedance. Switching Regulators are Disabled in UVLO
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k, unless otherwise noted.
CONDITIONS MIN 0.6 20 20 50 2.7 2.5 2.6 2.8 2.25 5.5 2.9 2.7 50 10 225 35 20 20 600 400 60 50 0.78 800 300 300 TYP MAX UNITS s ns ns ns V V V MHz nA % k A A A A A mA mA mA mA V A A A A A mA mA mA mA V V mV
General Purpose Switching Regulators 1, 2 and 3
fOSC IFB1,2,3 D1,2,3 RSW1,2,3_PD IVIN1
1.8 -50 100
General Purpose Switching Regulator 1 60 35 35 1 1100
ILIM1 IOUT1
VFB1 RP1 RN1 RLDO_CL1 RLDO_OL1 IVIN2
VFB1 Servo Voltage PMOS RDS(ON) NMOS RDS(ON) LDO Mode Closed-Loop ROUT LDO Mode Open-Loop ROUT Pulse Skip Mode Input Current Burst Mode Input Current Forced Burst Mode Input Current LDO Mode Input Current Shutdown Input Current PMOS Switch Current Limit Available Output Current
0.80 0.6 0.7 0.25
0.82
(Note 8) IOUT2 = 0A (Note 6) IOUT2 = 0A (Note 6) IOUT2 = 0A (Note 6) IOUT2 = 0A (Note 6) IOUT2 = 0A, FB2 = 0V Pulse Skip/Burst Mode Operation Pulse Skip/Burst Mode Operation (GBNT) Forced Burst Mode Operation (GBNT) LDO Mode (GBNT) Full Scale (1, 1, 1, 1) (Note 7) Zero Scale (0, 0, 0, 0) (Note 7)
2.5 225 35 20 20 600 400 60 50 0.78 0.405 800
General Purpose Switching Regulator 2 60 35 35 1 1100
ILIM2 IOUT2
VFBHIGH2 VFBLOW2 VLSB2
Maximum Servo Voltage Minimum Servo Voltage VFB2 Servo Voltage Step Size
0.80 0.425 25
0.82 0.445
Burst Mode is a registered trademark of Linear Technology Corporation.
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LTC3555 ELECTRICAL CHARACTERISTICS
SYMBOL RP2 RN2 RLDO_CL2 RLDO_OL2 IVIN3 PARAMETER PMOS RDS(ON) NMOS RDS(ON) LDO Mode Closed-Loop ROUT LDO Mode Open-Loop ROUT Pulse Skip Mode Input Current Burst Mode Input Current Forced Burst Mode Input Current LDO Mode Input Current Shutdown Input Current PMOS Switch Current Limit Available Output Current (Note 8) IOUT3 = 0A (Note 6) IOUT3 = 0A (Note 6) IOUT3 = 0A (Note 6) IOUT3 = 0A (Note 6) IOUT3 = 0A, FB3 = 0V Pulse Skip/Burst Mode Operation Pulse Skip/Burst Mode Operation (GBNT) Forced Burst Mode Operation (GBNT) LDO Mode (GBNT) Full Scale (1, 1, 1, 1) (Note 7) Zero Scale (0, 0, 0, 0) (Note 7)
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k, unless otherwise noted.
CONDITIONS MIN TYP 0.6 0.7 0.25 2.5 225 35 20 20 1500 1000 150 50 0.78 0.405 2000 MAX UNITS A A A A A mA mA mA mA V V mV ms
General Purpose Switching Regulator 3 60 35 35 1 2800
ILIM3 IOUT3
VFBHIGH3 VFBLOW3 VLSB3 RP3 RN3 RLDOCL3 RLDOOL3 tRST3
Maximum Servo Voltage Minimum Servo Voltage VFB Servo Voltage Step Size PMOS RDS(ON) NMOS RDS(ON) LDO Mode Closed Loop ROUT LDO Mode Open Loop ROUT Power On Reset Time for Switching Regulator
0.80 0.425 25 0.18 0.30 0.25
0.82 0.445
(Note 8) VFB3 Within 92% of Final Value to RST3 Hi-Z
2.5 230
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3555E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: The LTC3555E includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
Note 4: Total input current is the sum of quiescent current, IVBUSQ, and measured current given by: VCLPROG/RCLPROG * (hCLPROG +1) Note 5: hC/10 is expressed as a fraction of measured full charge current with indicated PROG resistor. Note 6: FBx above regulation such that regulator is in sleep. Specification does not include resistive divider current reflected back to VINx. Note 7: Applies to Pulse Skip, Burst Mode operation and Forced Burst Mode operation only. Note 8: Inductor series resistance adds to open-loop ROUT.
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LTC3555 TYPICAL PERFORMANCE CHARACTERISTICS
Ideal Diode V-I Characteristics
1.0 INTERNAL IDEAL DIODE WITH SUPPLEMENTAL EXTERNAL VISHAY Si2333 PMOS RESISTANCE () 0.25
Ideal Diode Resistance vs Battery Voltage
4.50
Output Voltage vs Output Current (Battery Charger Disabled)
BAT = 4V VBUS = 5V 5x MODE
0.8 CURRENT (A)
0.20 INTERNAL IDEAL DIODE 0.15 OUTPUT VOLTAGE (V)
4.25
0.6 INTERNAL IDEAL DIODE ONLY 0.4
4.00 BAT = 3.4V 3.75
0.10 INTERNAL IDEAL DIODE WITH SUPPLEMENTAL EXTERNAL VISHAY Si2333 PMOS
0.2 VBUS = 0V VBUS = 5V 0 0 0.04 0.12 0.16 0.08 FORWARD VOLTAGE (V) 0.20
3555 G01
0.05
3.50
0 2.7
3.0
3.6 3.9 3.3 BATTERY VOLTAGE (V)
4.2
3555 G02
3.25
0
200
600 800 400 OUTPUT CURRENT (mA)
1000
3555 G03
USB Limited Battery Charge Current vs Battery Voltage
700 600 CHARGE CURRENT (mA) 500 400 300 200 100 5x USB SETTING, BATTERY CHARGER SET FOR 1A 0 3.0 3.3 3.6 2.7 3.9 BATTERY VOLTAGE (V) CHARGE CURRENT (mA) VBUS = 5V RPROG = 1k RCLPROG = 3k 150 125 100 75 50 25 0 4.2
3555 G04
USB Limited Battery Charge Current vs Battery Voltage
25
Battery Drain Current vs Battery Voltage
IVOUT = 0A VBUS = 0V
VBUS = 5V RPROG = 1k RCLPROG = 3k
BATTERY CURRENT (A)
20
15
10 VBUS = 5V (SUSPEND MODE)
5 1x USB SETTING, BATTERY CHARGER SET FOR 1A 2.7 3.0 3.3 3.6 3.9 BATTERY VOLTAGE (V) 4.2
3555 G05
0 2.7
3.0
3.6 3.9 3.3 BATTERY VOLTAGE (V)
4.2
3555 G06
PowerPath Switching Regulator Efficiency vs Output Current
100 90 EFFICIENCY (%) 80 70 60 50 40 0.01 BAT = 3.8V 1x MODE 90 5x, 10x MODE 88 EFFICIENCY (%)
Battery Charging Efficiency vs Battery Voltage with No External Load (PBAT/PBUS)
RCLPROG = 3k RPROG = 1k IVOUT = 0mA 5x CHARGING EFFICIENCY 86 1x CHARGING EFFICIENCY QUIESCENT CURRENT (A) 50
VBUS Current vs VBUS Voltage (Suspend)
BAT = 3.8V IVOUT = 0mA 40
30
84
20
82
10
0.1 OUTPUT CURRENT (A)
1
3555 G07
80 2.7
3.0
3.6 3.9 3.3 BATTERY VOLTAGE (V)
4.2
3555 G08
0
0
1
3 2 BUS VOLTAGE (V)
4
5
3555 G09
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LTC3555 TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage vs Load Current in Suspend
5.0 0.5
VBUS Current vs Load Current in Suspend
3.4 VBUS = 5V BAT = 3.3V RCLPROG = 3k OUTPUT VOLTAGE (V) 3.2
3.3V LDO Output Voltage vs Load Current, VBUS = 0V
BAT = 3.9V, 4.2V BAT = 3.4V BAT = 3.5V BAT = 3.6V
4.5 OUTPUT VOLTAGE (V) VBUS CURRENT (mA)
0.4
4.0
0.3
3.0
3.5
0.2
2.8
3.0
VBUS = 5V BAT = 3.3V RCLPROG = 3k 0 0.1 0.3 0.4 0.2 LOAD CURRENT (mA) 0.5
3555 G10
0.1
2.5
0
2.6 0 0.1 0.3 0.4 0.2 LOAD CURRENT (mA) 0.5
3555 G11
BAT = 3V BAT = 3.1V BAT = 3.2V BAT = 3.3V 0 5 15 20 10 LOAD CURRENT (mA) 25
3555 G12
Battery Charge Current vs Temperature
600 500 CHARGE CURRENT (mA) 400 THERMAL REGULATION 300 200 100 0 -40 -20 RPROG = 2k 10x MODE 0 20 40 60 80 TEMPERATURE (C) 100 120
3555 G13
Battery Charger Float Voltage vs Temperature
4.21 3.68
Low-Battery (Instant-On) Output Voltage vs Temperature
BAT = 2.7V IVOUT = 100mA 5x MODE OUTPUT VOLTAGE (V)
4.20 FLOAT VOLTAGE (V)
3.66
4.19
3.64
4.18
3.62
4.17 -40
-15
35 10 TEMPERATURE (C)
60
85
3555 G14
3.60 -40
-15
35 10 TEMPERATURE (C)
60
85
3555 G15
Oscillator Frequency vs Temperature
2.6 15
VBUS Quiescent Current vs Temperature
VBUS = 5V IVOUT = 0A QUIESCENT CURRENT (A) 5x MODE 70
VBUS Quiescent Current in Suspend vs Temperature
IVOUT = 0A
2.4 FREQUENCY (MHz) VBUS = 5V 2.2 BAT = 3V VBUS = 0V BAT = 2.7V VBUS = 0V 1.8 -40 -15 35 10 TEMPERATURE (C)
QUIESCENT CURRENT (mA)
BAT = 3.6V VBUS = 0V
12
60
9
50
1x MODE 6
2.0
40
60
85
3555 G16
3 -40
-15
35 10 TEMPERATURE (C)
60
85
3555 G17
30 -40
-15
35 10 TEMPERATURE (C)
60
85
3555 G18
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LTC3555 TYPICAL PERFORMANCE CHARACTERISTICS
RST3, CHRG Pin Current vs Voltage (Pull-Down State)
100 RST3, CHRG PIN CURRENT (mA) VBUS = 5V BAT = 3.8V BATTERY CURRENT (A) ILDO3V3 5mA/DIV 0mA VLDO3V3 20mV/DIV AC COUPLED
3555 G20
3.3V LDO Step Response (5mA to 15mA)
50
Battery Drain Current vs Temperature
BAT = 3.8V VBUS = 0V BUCK REGULATORS OFF
80
40
60
30
40
20
20 BAT = 3.8V 0 20s/DIV
10
0
1
3 4 2 CHRG PIN VOLTAGE (V)
5
3555 G19
0 -40
-15
35 10 TEMPERATURE (C)
60
85
3555 G21
RDS(ON) for Switching Regulator Power Switches vs Temperature
1.0 REGULATORS 1, 2 0.8 ON-RESISTANCE () CURRENT LIMIT (A) NMOS SWITCH 0.6 PMOS SWITCH 0.4 NMOS SWITCH PMOS SWITCH 0 -40 -15 35 10 TEMPERATURE (C) 60 85
3555 G22
Switching Regulator Current Limit vs Temperature
2.0 REGULATOR 3 1.5 40 INPUT CURRENT (A) 50
Switching Regulator Low Power Mode Quiescent Currents
VIN1,2,3 = 3.8V VOUT1,2,3 = 2.5V Burst Mode OPERATION 30 FORCED Burst Mode OPERATION LDO MODE 10
1.0
REGULATOR 3
REGULATORS 1, 2
20
0.2
0.5
VIN1,2,3 = 3.8V 0 -15 35 -40 10 TEMPERATURE (C)
60
85
3555 G23
0 -40
-15
35 10 TEMPERATURE (C)
60
85
3555 G24
Switching Regulators 1, 2 Pulse Skip Mode Quiescent Currents
325 VIN1,2 = 3.8V 1.95 400
Switching Regulator 3 Pulse Skip Mode Quiescent Currents
VOUT3 = 2.5V 11
Switching Regulator Soft-Start Waveform
300 INPUT CURRENT (A) VOUT1,2 = 2.5V (CONSTANT FREQUENCY)
1.90 INPUT CURRENT (mA) INPUT CURRENT (A)
275
1.85
VIN3 = 3.5V (CONSTANT FREQUENCY) 300 9
250
1.80
225 VOUT1,2 = 1.25V (PULSE SKIPPING) 200 -40 -15 35 10 TEMPERATURE (C) 60 85
3555 G25
1.75
250 VIN3 = 3.8V (PULSE SKIPPING) 200 -40 -15 35 10 TEMPERATURE (C) 60 85
3555 G26
8
VOUT 500mV/DIV
350
10
INPUT CURRENT (mA)
50s/DIV 7
3555 G27
1.70
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LTC3555 TYPICAL PERFORMANCE CHARACTERISTICS
Switching Regulators 1, 2 Pulse Skip Mode Efficiency
100 90 80 EFFICIENCY (%) EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 VIN1,2 = 3.8V 10 100 LOAD CURRENT (mA) 1000
3555 G28
Switching Regulators 1, 2 Burst Mode Efficiency
100 90 80 VOUT1,2 = 2.5V VOUT1,2 = 1.2V EFFICIENCY (%) VOUT1,2 = 1.8V 100 90 80 70 60 50 40 30 20 10 VIN1,2 = 3.8V 1 10 100 LOAD CURRENT (mA) 1000
3555 G29
Switching Regulators 1, 2 Forced Burst Mode Efficiency
VOUT1,2 = 2.5V VOUT1,2 = 1.2V VOUT1,2 = 1.8V
VOUT1,2 = 2.5V VOUT1,2 = 1.2V VOUT1,2 = 1.8V
70 60 50 40 30 20 10 0 0.1
0 0.1
VIN1,2 = 3.8V 1 10 100 LOAD CURRENT (mA) 1000
3555 G30
Switching Regulator 3 Pulse Skip Mode Efficiency
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 10 100 LOAD CURRENT (mA) 1000
3555 G28
Switching Regulator 3 Burst Mode Efficiency
100 90 80 EFFICIENCY (%) EFFICIENCY (%) VIN3 = 3.8V 100 VOUT3 = 2.5V 90 80 VOUT3 = 1.2V VOUT3 = 1.8V 70 60 50 40 30 20 10 1 10 100 LOAD CURRENT (mA) 1000
3555 G32
Switching Regulator 3 Forced Burst Mode Efficiency
VIN3 = 3.8V VOUT3 = 2.5V
VIN3 = 3.8V
VOUT3 = 2.5V VOUT3 = 1.2V VOUT3 = 1.8V
70 60 50 40 30 20 10 0 0.1
VOUT3 = 1.2V VOUT3 = 1.8V
0 0.1
1
10 100 LOAD CURRENT (mA)
1000
3555 G33
Switching Regulators 1, 2 Load Regulation at VOUT1,2 = 1.2V
1.230 VBUS = 3.8V Burst Mode OPERATION OUTPUT VOLTAGE (V) 1.845
Switching Regulators 1, 2 Load Regulation at VOUT1,2 = 1.8V
VBUS = 3.8V Burst Mode OPERATION PULSE SKIP MODE 1.800 FORCED Burst Mode OPERATION OUTPUT VOLTAGE (V) 1.823 2.56
Switching Regulators 1, 2 Load Regulation at VOUT1,2 = 2.5V
VBUS = 3.8V
OUTPUT VOLTAGE (V)
1.215
2.53 Burst Mode OPERATION PULSE SKIP MODE 2.50 FORCED Burst Mode OPERATION
1.200 PULSE SKIP MODE 1.185 FORCED Burst Mode OPERATION 1 10 100 LOAD CURRENT (mA) 1000
3555 G34
1.778
2.47
1.170 0.1
1.755 0.1
1
10 100 LOAD CURRENT (mA)
1000
3555 G35
2.44 0.1
1
10 100 LOAD CURRENT (mA)
1000
3555 G36
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LTC3555 PIN FUNCTIONS
LDO3V3 (Pin 1): 3.3V LDO Output Pin. This pin provides a regulated always-on 3.3V supply voltage. LDO3V3 gets its power from VOUT. It may be used for light loads such as a watch dog microprocessor or real time clock. A 1F capacitor is required from LDO3V3 to ground. If the LDO3V3 output is not used it should be disabled by connecting it to VOUT. CLPROG (Pin 2): USB Current Limit Program and Monitor Pin. A resistor from CLPROG to ground determines the upper limit of the current drawn from the VBUS pin. A fraction of the VBUS current is sent to the CLPROG pin when the synchronous switch of the PowerPath switching regulator is on. The switching regulator delivers power until the CLPROG pin reaches 1.188V. Several VBUS current limit settings are available via user input which will typically correspond to the 500mA and 100mA USB specifications. A multi-layer ceramic averaging capacitor or R-C network is required at CLPROG for filtering. NTC (Pin 3): Input to the Thermistor Monitoring Circuits. The NTC pin connects to a battery's thermistor to determine if the battery is too hot or too cold to charge. If the battery's temperature is out of range, charging is paused until it re-enters the valid range. A low drift bias resistor is required from VBUS to NTC and a thermistor is required from NTC to ground. If the NTC function is not desired, the NTC pin should be grounded. FB2 (Pin 4): Feedback Input for Switching Regulator 2. When regulator 2's control loop is complete, this pin servos to 1 of 16 possible set-points based on the commanded value from the I2C serial port. See Table 4. VIN2 (Pin 5): Power Input for Switching Regulator 2. This pin will generally be connected to VOUT. A 1F MLCC capacitor is recommended on this pin. SW2 (Pin 6): Power Transmission Pin for Switching Regulator 2. EN2 (Pin 7): Logic Input. This logic input pin independently enables switching regulator 2. This pin is logically OR-ed with its corresponding bit in the I2C serial port. See Table 2. DVCC (Pin 8): Logic Supply for the I2C Serial Port. If the serial port is not needed it can be disabled by grounding DVCC. When DVCC is grounded, chip control is automatically passed to the individual logic input pins. SCL (Pin 9): Clock Input Pin for the I2C Serial Port. The I2C logic levels are scaled with respect to DVCC. If DVCC is grounded, the SCL pin is equivalent to the B5 bit in the I2C serial port. SCL in conjunction with SDA determine the operating modes of switching regulators 1, 2 and 3 when DVCC is grounded. See Tables 2 and 5. SDA (Pin 10): Data Input Pin for the I2C Serial Port. The I2C logic levels are scaled with respect to DVCC. If DVCC is grounded, the SDA pin is equivalent to the B6 bit in the I2C serial port. SDA in conjunction with SCL determine the operating modes of switching regulators 1, 2 and 3 when DVCC is grounded. See Tables 2 and 5. VIN3 (Pin 11): Power Input for Switching Regulator 3. This pin will generally be connected to VOUT. A 1F MLCC capacitor is recommended on this pin. SW3 (Pin 12): Power Transmission Pin for Switching Regulator 3. EN3 (Pin 13): Logic Input. This logic input pin independently enables switching regulator 3. This pin is logically OR-ed with its corresponding bit in the I2C serial port. See Table 2. FB3 (Pin 14): Feedback Input for Switching Regulator 3. When regulator 3's control loop is complete, this pin servos to 1 of 16 possible set-points based on the commanded value from the I2C serial port. See Table 4. RST3 (Pin 15): Logic Output. This in an open-drain output which indicates that switching regulator 3 has settled to its final value. It can be used as a power-on reset for the primary microprocessor or to enable the other switching regulators for supply sequencing. EN1 (Pin 16): Logic Input. This logic input pin independently enables switching regulator 1. This pin is logically OR-ed with its corresponding bit in the I2C serial port. See Table 2.
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LTC3555 PIN FUNCTIONS
SW1 (Pin 17): Power Transmission Pin for Switching Regulator 1. VIN1 (Pin 18): Power Input for Switching Regulator 1. This pin will generally be connected to VOUT. A 1F MLCC capacitor is recommended on this pin. FB1 (Pin 19): Feedback Input for Switching Regulator 1. When regulator 1's control loop is complete, this pin servos to a fixed voltage of 0.8V. PROG (Pin 20): Charge Current Program and Charge Current Monitor Pin. Connecting a resistor from PROG to ground programs the charge current. If sufficient input power is available in constant-current mode, this pin servos to 1V. The voltage on this pin always represents the actual charge current. CHRG (Pin 21): Open-Drain Charge Status Output. The CHRG pin indicates the status of the battery charger. Four possible states are represented by CHRG: charging, not charging, unresponsive battery and battery temperature out of range. CHRG is modulated at 35kHz and switches between a low and a high duty cycle for easy recognition by either humans or microprocessors. See Table 1. CHRG requires a pull-up resistor and/or LED to provide indication. GATE (Pin 22): Analog Output. This pin controls the gate of an optional external P-channel MOSFET transistor used to supplement the ideal diode between VOUT and BAT. The external ideal diode operates in parallel with the internal ideal diode. The source of the P-channel MOSFET should be connected to VOUT and the drain should be connected to BAT. If the external ideal diode FET is not used, GATE should be left floating. BAT (Pin 23): Single Cell Li-Ion Battery Pin. Depending on available VBUS power, a Li-Ion battery on BAT will either deliver power to VOUT through the ideal diode or be charged from VOUT via the battery charger. VOUT (Pin 24): Output voltage of the Switching PowerPath Controller and Input Voltage of the Battery Charger. The majority of the portable product should be powered from VOUT. The LTC3555 will partition the available power between the external load on VOUT and the internal battery charger. Priority is given to the external load and any extra power is used to charge the battery. An ideal diode from BAT to VOUT ensures that VOUT is powered even if the load exceeds the allotted power from VBUS or if the VBUS power source is removed. VOUT should be bypassed with a low impedance ceramic capacitor. VBUS (Pin 25): Primary Input Power Pin. This pin delivers power to VOUT via the SW pin by drawing controlled current from a DC source such as a USB port or wall adapter. SW (Pin 26): Power Transmission Pin for the USB Power Path. The SW pin delivers power from VBUS to VOUT via the step-down switching regulator. A 3.3H inductor should be connected from SW to VOUT. ILIM0, ILIM1 (Pins 27, 28): Logic Inputs. ILIM0 and ILIM1 control the current limit of the PowerPath switching regulator. See Table 3. Both of the ILIM0 and ILIM1 pins are logically OR-ed with their corresponding bits in the I2C serial port. See Table 2. Exposed Pad (Pin 29): Ground. The Exposed Pad should be connected to a continuous ground plane on the second layer of the printed circuit board by several vias directly under the LTC3555.
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LTC3555 BLOCK DIAGRAM
VBUS 25 2.25MHz PowerPath SWITCHING REGULATOR 3.3V LDO SUSPEND LDO 500A 24 VOUT
26 SW 1 LDO3V3
+
CLPROG 2 CC/CV CHARGER 0.3V 3.6V 20 PROG 18 VIN1 CHRG 21 CHARGE STATUS ENABLE 17 SW1 400mA 2.25MHz SWITCHING REGULATOR 1 IDEAL
- + -
15mV
22 GATE
NTC 3
BATTERY TEMPERATURE MONITOR
1.188V
D/A
ILIM DECODE LOGIC
4
D/A ILIM0 27 ILIM1 28 EN1 16 EN2 7 EN3 13 DVCC 8 SDA 10 SCL 9 I2C PORT 4
-+
ENABLE 400mA 2.25MHz SWITCHING REGULATOR 2 ENABLE 1A 2.25MHz SWITCHING REGULATOR 3 29 GND
+ + -
+ -
23 BAT
19 FB1
5 VIN2 6 SW2
4 FB2 11 VIN3 12 SW3
14 FB3 15 RST3
3555 BD
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LTC3555 TIMING DIAGRAM
I2C Timing Diagram
DATA BYTE A ADDRESS 0 START SDA 0 0 0 1 0 0 1 0 ACK ACK ACK 0 0 1 0 0 1 WR 0 A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 STOP DATA BYTE B
SCL
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SDA tSU, DAT tLOW SCL tHD, STA START CONDITION tr tHIGH tf REPEATED START CONDITION tSP STOP CONDITION START CONDITION tHD, DAT tSU, STA tHD, STA tBUF tSU, STO
3555 TD
OPERATION
Introduction The LTC3555 is a highly integrated power management IC which includes a high efficiency switch mode PowerPath controller, a battery charger, an ideal diode, an alwayson LDO and three general purpose step-down switching regulators. The entire chip is controlled by either direct digital control or by an I2C serial port or both. Designed specifically for USB applications, the PowerPath controller incorporates a precision average input current step-down switching regulator to make maximum use of the allowable USB power. Because power is conserved, the LTC3555 allows the load current on VOUT to exceed the current drawn by the USB port without exceeding the USB load specifications. The PowerPath switching regulator and battery charger communicate to ensure that the input current never violates the USB specifications. The ideal diode from BAT to VOUT guarantees that ample power is always available to VOUT even if there is insufficient or absent power at VBUS. An "always on" LDO provides a regulated 3.3V from available power at VOUT. Drawing very little quiescent current, this LDO will be on at all times and can be used to supply up to 25mA. The three general purpose switching regulators can be independently enabled via either direct digital control or by operating the I2C serial port. Under I2C control, two of the three switching regulators have adjustable set-points so that voltages can be reduced when high processor performance is not needed. Along with constant frequency PWM mode, all three switching regulators have a low power burst-only mode setting as well as automatic Burst Mode operation and LDO modes for significantly reduced quiescent current under light load conditions. High Efficiency Switching PowerPath Controller Whenever VBUS is available and the PowerPath switching regulator is enabled, power is delivered from VBUS to VOUT via SW. VOUT drives the combination of the external load (switching regulators 1, 2 and 3) and the battery charger. If the combined load does not exceed the PowerPath switching regulator's programmed input current limit, VOUT will track 0.3V above the battery. By keeping the voltage across the battery charger low, efficiency is optimized because power lost to the linear battery charger is minimized. Power available to the external load is therefore optimized.
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LTC3555 OPERATION
If the combined load at VOUT is large enough to cause the switching power supply to reach the programmed input current limit, the battery charger will reduce its charge current by that amount necessary to enable the external load to be satisfied. Even if the battery charge current is set to exceed the allowable USB current, the USB specification will not be violated. The switching regulator will limit the average input current so that the USB specification is never violated. Furthermore, load current at VOUT will always be prioritized and only excess available power will be used to charge the battery. If the voltage at BAT is below 3.3V, or the battery is not present, and the load requirement does not cause the switching regulator to exceed the USB specification, VOUT will regulate at 3.6V. If the load exceeds the available power, VOUT will drop to a voltage between 3.6V and the battery voltage. If there is no battery present when the load exceeds the available USB power, VOUT can drop toward ground. The power delivered from VBUS to VOUT is controlled by a 2.25MHz constant-frequency step-down switching regulator. To meet the USB maximum load specification, the switching regulator includes a control loop which ensures that the average input current is below the level programmed at CLPROG. The current at CLPROG is a fraction (hCLPROG-1) of the VBUS current. When a programming resistor and an averaging capacitor are connected from CLPROG to GND, the voltage on CLPROG represents the average input current of the switching regulator. When the input current approaches the programmed limit, CLPROG reaches VCLPROG, 1.188V, and power out is held constant. The input current limit is programmed by the ILIM0 and ILIM1 pins or by the I2C serial port. It can be configured to limit average input current to one of several possible settings as well as be deactivated (USB Suspend). The input current limit will be set by the VCLPROG servo voltage and the resistor on CLPROG according to the following expression: IVBUS = IVBUSQ + VCLPROG * (hCLPROG + 1 ) RCLPROG
4.5 4.2 3.9 VOUT (V) NO LOAD 3.6 300mV 3.3 3.0 2.7 2.4 2.4
2.7
3.0
3.6 3.3 BAT (V)
3.9
4.2
3555 F01
Figure 1. VOUT vs BAT
Ideal Diode from BAT to VOUT The LTC3555 has an internal ideal diode as well as a controller for an optional external ideal diode. The ideal diode controller is always on and will respond quickly whenever VOUT drops below BAT. If the load current increases beyond the power allowed from the switching regulator, additional power will be pulled from the battery via the ideal diode. Furthermore, if power to VBUS (USB or wall power) is removed, then all of the application power will be provided by the battery via the ideal diode. The transition from input power to battery power at VOUT will be quick enough to allow only the 10F capacitor to keep VOUT from drooping. The ideal diode consists of a precision amplifier that enables a large on-chip P-channel MOSFET transistor whenever the voltage
2200 2000 1800 1600 CURRENT (mA) 1400 1200 1000 800 600 400 200 0 0 60 120 180 240 300 360 420 480 FORWARD VOLTAGE (mV) (BAT - VOUT)
3555 F02
VISHAY Si2333 OPTIONAL EXTERNAL IDEAL DIODE
LTC3555 IDEAL DIODE
ON SEMICONDUCTOR MBRM120LT3
Figure 1 shows the range of possible voltages at VOUT as a function of battery voltage.
Figure 2. Ideal Diode Operation
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LTC3555 OPERATION
at VOUT is approximately 15mV (VFWD) below the voltage at BAT. The resistance of the internal ideal diode is approximately 180m. If this is sufficient for the application, then no external components are necessary. However, if more conductance is needed, an external P-channel MOSFET transistor can be added from BAT to VOUT. When an external P-channel MOSFET transistor is present, the GATE pin of the LTC3555 drives its gate for automatic ideal diode control. The source of the external P-channel MOSFET should be connected to VOUT and the drain should be connected to BAT. Capable of driving a 1nF load, the GATE pin can control an external P-channel MOSFET transistor having an on-resistance of 40m or lower. Suspend LDO If the LTC3555 is configured for USB suspend mode, the switching regulator is disabled and the suspend LDO provides power to the VOUT pin (presuming there is power available to VBUS). This LDO will prevent the battery from running down when the portable product has access to a suspended USB port. Regulating at 4.6V, this LDO only becomes active when the switching converter is disabled (Suspended). To remain compliant with the USB specification, the input to the LDO is current limited so that it will not exceed the 500A low power suspend specification. If the load on VOUT exceeds the suspend current limit, the additional current will come from the battery via the ideal diode. 3.3V Always-On LDO Supply The LTC3555 includes a low quiescent current low dropout regulator that is always powered. This LDO can be used to provide power to a system pushbutton controller, standby microcontroller or real time clock. Designed to deliver up to 25mA, the always-on LDO requires at least a 1F low impedance ceramic bypass capacitor for compensation. The LDO is powered from VOUT , and therefore will enter dropout at loads less than 25mA as VOUT falls near 3.3V. If the LDO3V3 output is not used, it should be disabled by connecting it to VOUT. VBUS Undervoltage Lockout (UVLO) An internal undervoltage lockout circuit monitors VBUS and keeps the PowerPath switching regulator off until VBUS rises above 4.30V and is about 200mV above the battery voltage. Hysteresis on the UVLO turns off the regulator if VBUS drops below 4.00V or to within 50mV of BAT. When this happens, system power at VOUT will be drawn from the battery via the ideal diode.
TO USB OR WALL ADAPTER
25
VBUS
SW
26
3.5V TO (BAT + 0.3V) TO SYSTEM LOAD
PWM AND GATE DRIVE ISWITCH/ hCLPROG CONSTANT CURRENT CONSTANT VOLTAGE BATTERY CHARGER 15mV 0.3V 3.6V IDEAL DIODE
VOUT
24
+ - + -
GATE
22
OPTIONAL EXTERNAL IDEAL DIODE PMOS
2
1.188V
AVERAGE INPUT CURRENT LIMIT CONTROLLER
AVERAGE OUTPUT VOLTAGE LIMIT CONTROLLER
3555 F03
Figure 3. PowerPath Block Diagram
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+ + -
+ -
CLPROG
+-
BAT
23
+
SINGLE CELL Li-Ion
LTC3555 OPERATION
Battery Charger The LTC3555 includes a constant-current / constant-voltage battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out-oftemperature charge pausing. Battery Preconditioning When a battery charge cycle begins, the battery charger first determines if the battery is deeply discharged. If the battery voltage is below VTRKL, typically 2.85V, an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. If the low voltage persists for more than 1/2 hour, the battery charger automatically terminates and indicates via the CHRG pin that the battery was unresponsive. Once the battery voltage is above 2.85V, the battery charger begins charging in full power constant-current mode. The current delivered to the battery will try to reach 1022V/ RPROG. Depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. The external load will always be prioritized over the battery charge current. The USB current limit programming will always be observed and only additional power will be available to charge the battery. When system loads are light, battery charge current will be maximized. Charge Termination The battery charger has a built-in safety timer. When the voltage on the battery reaches the pre-programmed float voltage of 4.200V, the battery charger will regulate the battery voltage and the charge current will decrease naturally. Once the battery charger detects that the battery has reached 4.200V, the four hour safety timer is started. After the safety timer expires, charging of the battery will discontinue and no more current will be delivered. Automatic Recharge After the battery charger terminates, it will remain off drawing only microamperes of current from the battery. If the portable product remains in this state long enough, the battery will eventually self discharge. To ensure that the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below 4.1V. In the event that the safety timer is running when the battery voltage falls below 4.1V, it will reset back to zero. To prevent brief excursions below 4.1V from resetting the safety timer, the battery voltage must be below 4.1V for more than 1.3ms. The charge cycle and safety timer will also restart if the VBUS UVLO cycles low and then high (e.g., VBUS is removed and then replaced), or if the battery charger is cycled on and off by the I2C port. Charge Current The charge current is programmed using a single resistor from PROG to ground. 1/1022th of the battery charge current is sent to PROG which will attempt to servo to 1.000V. Thus, the battery charge current will try to reach 1022 times the current in the PROG pin. The program resistor and the charge current are calculated using the following equations: RPROG = 1022V 1022V , ICHRG = ICHRG RPROG
In either the constant-current or constant-voltage charging modes, the voltage at the PROG pin will be proportional to the actual charge current delivered to the battery. Therefore, the actual charge current can be determined at any time by monitoring the PROG pin voltage and using the following equation: IBAT = VPROG * 1022 RPROG
In many cases, the actual battery charge current, IBAT, will be lower than ICHG due to limited input power available and prioritization with the system load drawn from VOUT. Charge Status Indication The CHRG pin indicates the status of the battery charger. Four possible states are represented by CHRG which include charging, not charging, unresponsive battery, and battery temperature out of range. The signal at the CHRG pin can be easily recognized as one of the above four states by either a human or a microprocessor. An open-drain output, the CHRG pin can
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LTC3555 OPERATION
drive an indicator LED through a current limiting resistor for human interfacing or simply a pull-up resistor for microprocessor interfacing. To make the CHRG pin easily recognized by both humans and microprocessors, the pin is either Low for charging, High for not charging, or it is switched at high frequency (35kHz) to indicate the two possible faults, unresponsive battery and battery temperature out of range. When charging begins, CHRG is pulled low and remains low for the duration of a normal charge cycle. When charging is complete, i.e., the BAT pin reaches 4.200V and the charge current has dropped to one tenth of the programmed value, the CHRG pin is released (Hi-Z). If a fault occurs, the pin is switched at 35kHz. While switching, its duty cycle is modulated between a high and low value at a very low frequency. The low and high duty cycles are disparate enough to make an LED appear to be on or off thus giving the appearance of "blinking". Each of the two faults has its own unique "blink" rate for human recognition as well as two unique duty cycles for machine recognition. The CHRG pin does not respond to the C/10 threshold if the LTC3555 is in VBUS current limit. This prevents false end of charge indications due to insufficient power available to the battery charger. Table 1 illustrates the four possible states of the CHRG pin when the battery charger is active.
Table 1. CHRG Signal
STATUS Charging Not Charging NTC Fault Bad Battery FREQUENCY 0Hz 0Hz 35kHz 35kHz MODULATION (BLINK) FREQUENCY 0Hz (Lo-Z) 0Hz (Hi-Z) 1.5Hz at 50% 6.1Hz at 50% DUTY CYCLES 100% 0% 6.25% to 93.75% 12.5% to 87.5%
would easily recognize the frantic 6.1Hz "fast" blink of the LED while a microprocessor would be able to decode either the 12.5% or 87.5% duty cycles as a bad battery fault. Note that the LTC3555 is a three terminal PowerPath product where system load is always prioritized over battery charging. Due to excessive system load, there may not be sufficient power to charge the battery beyond the trickle charge threshold voltage within the bad battery timeout period. In this case, the battery charger will falsely indicate a bad battery. System software may then reduce the load and reset the battery charger to try again. Although very improbable, it is possible that a duty cycle reading could be taken at the bright-dim transition (low duty cycle to high duty cycle). When this happens the duty cycle reading will be precisely 50%. If the duty cycle reading is 50%, system software should disqualify it and take a new duty cycle reading. NTC Thermistor The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor close to the battery pack. To use this feature, connect the NTC thermistor, RNTC, between the NTC pin and ground and a resistor, RNOM, from VBUS to the NTC pin. RNOM should be a 1% resistor with a value equal to the value of the chosen NTC thermistor at 25C (R25). A 100k thermistor is recommended since thermistor current is not measured by the LTC3555 and will have to be budgeted for USB compliance. The LTC3555 will pause charging when the resistance of the NTC thermistor drops to 0.54 times the value of R25 or approximately 54k. For a Vishay "Curve 1" thermistor, this corresponds to approximately 40C. If the battery charger is in constant voltage (float) mode, the safety timer also pauses until the thermistor indicates a return to a valid temperature. As the temperature drops, the resistance of the NTC thermistor rises. The LTC3555 is also designed to pause charging when the value of the NTC thermistor increases to 3.25 times the value of R25. For Vishay "Curve 1" this resistance, 325k, corresponds to approximately 0C. The hot and cold comparators each have approximately 3C of hysteresis to prevent oscillation
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An NTC fault is represented by a 35kHz pulse train whose duty cycle varies between 6.25% and 93.75% at a 1.5Hz rate. A human will easily recognize the 1.5Hz rate as a "slow" blinking which indicates the out-of-range battery temperature while a microprocessor will be able to decode either the 6.25% or 93.75% duty cycles as an NTC fault. If a battery is found to be unresponsive to charging (i.e., its voltage remains below 2.85V for 1/2 hour), the CHRG pin gives the battery fault indication. For this fault, a human
18
LTC3555 OPERATION
about the trip point. Grounding the NTC pin disables the NTC charge pausing function. Thermal Regulation To optimize charging time, an internal thermal feedback loop may automatically decrease the programmed charge current. This will occur if the die temperature rises to approximately 110C. Thermal regulation protects the LTC3555 from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the LTC3555 or external components. The benefit of the LTC3555 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions with the assurance that the battery charger will automatically reduce the current in worst-case conditions. I2C Interface The LTC3555 may receive commands from a host (master) using the standard I2C 2-wire interface. The Timing Diagram shows the timing relationship of the signals on the bus. The two bus lines, SDA and SCL, must be high when the bus is not in use. External pull-up resistors or current sources, such as the LTC1694 I2C accelerator, are required on these lines. The LTC3555 is a receive-only slave device. The I2C control signals, SDA and SCL are scaled internally to the DVCC supply. DVCC should be connected to the same power supply as the microcontroller generating the I2C signals. The I2C port has an undervoltage lockout on the DVCC pin. When DVCC is below approximately 1V, the I2C serial port is cleared and switching regulators 2 and 3 are set to full scale. Bus Speed The I2C port is designed to be operated at speeds of up to 400kHz. It has built-in timing delays to ensure correct operation when addressed from an I2C compliant master device. It also contains input filters designed to suppress glitches should the bus become corrupted. Start and Stop Conditions A bus-master signals the beginning of a communication to a slave device by transmitting a Start condition. A Start condition is generated by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a Stop condition by transitioning SDA from low to high while SCL is high. The bus is then free for communication with another I2C device. Byte Format Each byte sent to the LTC3555 must be eight bits long followed by an extra clock cycle for the Acknowledge bit to be returned by the LTC3555. The data should be sent to the LTC3555 most significant bit (MSB) first. Acknowledge The Acknowledge signal is used for handshaking between the master and the slave. An Acknowledge (active low) generated by the slave (LTC3555) lets the master know that the latest byte of information was received. The Acknowledge related clock pulse is generated by the master. The master releases the SDA line (high) during the Acknowledge clock cycle. The slave-receiver must pull down the SDA line during the Acknowledge clock pulse so that it remains a stable Low during the High period of this clock pulse. Slave Address The LTC3555 responds to only one 7-bit address which has been factory programmed to 0001001. The eighth bit of the address byte (R/W) must be 0 for the LTC3555 to recognize the address since it is a write only device. This effectively forces the address to be eight bits long where the least significant bit of the address is 0. If the correct seven bit address is given but the R/W bit is 1, the LTC3555 will not respond Bus Write Operation The master initiates communication with the LTC3555 with a Start condition and a 7-bit address followed by the Write Bit R/W = 0. If the address matches that of the LTC3555, the LTC3555 returns an Acknowledge. The master
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LTC3555 OPERATION
Table 2. I2C Serial Port Mapping
A7 A6 A5 A4 A3 A2 A1 A0 B7 Disable Battery Charger B6 B5 B4 Enable Regulator 1 B3 Enable Regulator 2 B2 Enable Regulator 3 B1 B0 Switching Regulator 2 Voltage (See Table 4) Switching Regulator 3 Voltage (See Table 4) Switching Regulator Modes (See Table 5) Input Current Limit (See Table 3)
Table 3. USB Current Limit Settings B1 (ILIM1) 0 0 1 1 B0 (ILIM0) 0 1 0 1 USB SETTING 1x Mode (USB 100mA Limit) 10x Mode (Wall 1A Limit) Suspend 5x Mode (USB 500mA Limit)
Table 4. Switching Regulator Servo Voltage A7 A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A6 A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A5 A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A4 A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Switching Regulator 2 Servo Voltage Switching Regulator 3 Servo Voltage 0.425V 0.450V 0.475V 0.500V 0.525V 0.550V 0.575V 0.600V 0.625V 0.650V 0.675V 0.700V 0.725V 0.750V 0.775V 0.800V
should then deliver the most significant data byte. Again the LTC3555 acknowledges and the cycle is repeated for a total of one address byte and two data bytes. Each data byte is transferred to an internal holding latch upon the return of an Acknowledge. After both data bytes have been transferred to the LTC3555, the master may terminate the communication with a Stop condition. Alternatively, a Repeat-Start condition can be initiated by the master and another chip on the I2C bus can be addressed. This cycle can continue indefinitely and the LTC3555 will remember the last input of valid data that it received. Once all chips on the bus have been addressed and sent valid data, a global Stop condition can be sent and the LTC3555 will update its command latch with the data that it had received. In certain circumstances the data on the I2C bus may become corrupted. In these cases the LTC3555 responds appropriately by preserving only the last set of complete data that it has received. For example, assume the LTC3555 has been successfully addressed and is receiving data when a Stop condition mistakenly occurs. The LTC3555 will ignore this stop condition and will not respond until a new Start condition, correct address, new set of data and Stop condition are transmitted. Likewise, with only one exception, if the LTC3555 was previously addressed and sent valid data but not updated with a Stop, it will respond to any Stop that appears on the bus, independent of the number of Repeat-Starts that have occurred. If a Repeat-Start is given and the LTC3555 successfully acknowledges its address and first byte, it will not respond to a Stop until both bytes of the new data have been received and acknowledged. Disabling the I2C Port The I2C serial port can be disabled by grounding the DVCC pin. In this mode, control automatically passes to the individual logic input pins EN1, EN2, EN3, ILIM0, ILIM1, SDA and SCL. Some functionality is not available in this mode
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Table 5. General Purpose Switching Regulator Modes B6 (SDA)* 0 0 1 1 B5 (SCL)* 0 1 0 1 Switching Regulator Mode Pulse Skip Forced Burst Mode Operation LDO Mode Burst Mode Operation
*SDA and SCL take on this context only when DVCC = 0V.
20
LTC3555 OPERATION
such as the programmability of switching regulators 2 and 3's output voltage and the battery charger disable feature. In this mode, both of the programmable switching regulators have a fixed servo voltage of 0.8V. Because the SDA and SCL pins have no other context when DVCC is grounded, these pins are re-mapped to control the switching regulator mode bits B5 and B6. SCL maps to B5 and SDA maps to B6. RST3 Pin The RST3 pin is an open-drain output used to indicate that switching regulator 3 has been enabled and has reached its final voltage. RST3 remains low impedance until regulator 3 reaches 92% of its regulation value. A 230ms delay is included to allow a system microcontroller ample time to reset itself. RST3 may be used as a power-on reset to the microprocessor powered by regulator 3 or may be used to enable regulators 1 and/or 2 for supply sequencing.RST3 is an open-drain output and requires a pull-up resistor to the output voltage of regulator 3 or another appropriate power source General Purpose Step-Down Switching Regulators The LTC3555 contains three general purpose 2.25MHz step-down constant-frequency current mode switching regulators. Two regulators provide up to 400mA and a third switching regulator can produce up to 1A. All three switching regulators can be programmed for a minimum output voltage of 0.8V and can be used to power a microcontroller core, microcontroller I/O, memory, disk drive or other logic circuitry. Two of the switching regulators have I2C programmable set-points for on-the-fly power savings. All three converters support 100% duty cycle operation (low dropout mode) when their input voltage drops very close to their output voltage. To suit a variety of applications, selectable mode functions can be used to trade-off noise for efficiency. Four modes are available to control the operation of the LTC3555's general purpose switching regulators. At moderate to heavy loads, the Pulse Skip mode provides the least noise switching solution. At lighter loads, either Burst Mode operation, Forced Burst Mode operation or LDO mode may be selected. The switching regulators include soft-start to limit inrush current when powering on, short-circuit current protection and switch node slew limiting circuitry to reduce radiated EMI. No external compensation components are required. The operating mode of the regulators may be set by either I2C control or by manual control of the SDA and SCL pins if the I2C port is not used. Each converter may be individually enabled by either their external control pins EN1, EN2, EN3 or by the I2C port. Switching regulators 2 and 3, have individual programmable feedback servo voltages via I2C control. The switching regulator input supplies VIN1, VIN2 and VIN3 will generally be connected to the system load pin VOUT. Step-Down Switching Regulator Output Voltage Programming All three switching regulators can be programmed for output voltages greater than 0.8V. Switching regulators 2 and 3 have I2C programmable set-points while regulator 1 has a single fixed set-point. The full-scale output voltage for each switching regulator is programmed using a resistor divider from the switching regulator output connected to the feedback pins (FB1, FB2 and FB3) such that: R1 VOUTX = VFBX + 1 R2 where VFBX ranges from 0.425V to 0.8V for switching regulators 2 and 3 and VFBX is fixed at 0.8V for switching regulator 1. See Figure 4 Typical values for R1 are in the range of 40k to 1M. The capacitor CFB cancels the pole created by feedback resistors and the input capacitance of the FB pin and also helps to improve transient response for output voltages much greater than 0.8V. A variety of capacitor sizes can be used for CFB but a value of 10pF is recommended for most applications. Experimentation with capacitor sizes between 2pF and 22pF may yield improved transient response.
VINx SWx LTC3555 FBx R2 GND
3555 F04
L VOUTx CFB R1 COUT
Figure 4. Buck Converter Application Circuit
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LTC3555 OPERATION
Step-Down Switching Regulator Operating Modes The LTC3555's general purpose switching regulators include four possible operating modes to meet the noise/ power needs of a variety of applications. In Pulse Skip mode, an internal latch is set at the start of every cycle which turns on the main P-channel MOSFET switch. During each cycle, a current comparator compares the peak inductor current to the output of an error amplifier. The output of the current comparator resets the internal latch which causes the main P-channel MOSFET switch to turn off and the N-channel MOSFET synchronous rectifier to turn on. The N-channel MOSFET synchronous rectifier turns off at the end of the 2.25MHz cycle or if the current through the N-channel MOSFET synchronous rectifier drops to zero. Using this method of operation, the error amplifier adjusts the peak inductor current to deliver the required output power. All necessary compensation is internal to the switching regulator requiring only a single ceramic output capacitor for stability. At light loads in PWM mode, the inductor current may reach zero on each pulse which will turn off the N-channel MOSFET synchronous rectifier. In this case, the switch node (SW) goes high impedance and the switch node voltage will "ring". This is discontinuous mode operation, and is normal behavior for a switching regulator. At very light loads in Pulse Skip mode, the switching regulators will automatically skip pulses as needed to maintain output regulation. At high duty cycles (VOUTx > VINx /2) it is possible for the inductor current to reverse, causing the regulator to operate continuously at light loads. The is normal and regulation is maintained, but the supply current will increase to several milliamperes due to continuous switching. In Forced Burst Mode operation, the switching regulators use a constant current algorithm to control the inductor current. By controlling the inductor current directly and using a hysteretic control loop, both noise and switching losses are minimized. In this mode output power is limited. While in Forced Burst Mode operation, the output capacitor is charged to a voltage slightly higher than the regulation point. The step-down converter then goes into sleep mode, during which the output capacitor provides the load current. In sleep mode, most of the regulator's circuitry is powered down, helping conserve battery power. When the output voltage drops below a pre-determined value, the switching regulator circuitry is powered on and another burst cycle begins. The duration for which the regulator operates in sleep mode depends on the load current. The sleep time decreases as the load current increases. The maximum output current in Forced Burst Mode operation is about 100mA for switching regulators 1 and 2, and about 250mA for switching regulator 3. The step-down switching regulators will not enter Sleep mode if the maximum output current is exceeded in Forced Burst Mode operation and the output will drop out of regulation. Forced Burst Mode operation provides a significant improvement in efficiency at light loads at the expense of higher output ripple when compared to Pulse Skip mode. For many noise-sensitive systems, Forced Burst Mode operation might be undesirable at certain times (i.e., during a transmit or receive cycle of a wireless device), but highly desirable at others (i.e., when the device is in low power standby mode). The I2C port can be used to enable or disable Forced Burst Mode operation at any time, offering both low noise and low power operation when they are needed. In Burst Mode operation, the switching regulator automatically switches between fixed frequency PWM operation and hysteretic control as a function of the load current. At light loads, the regulators operate in hysteretic mode in much the same way as described for the Forced Burst operation. Burst Mode operation provides slightly less output ripple at the expense of slightly lower efficiency than Forced Burst mode operation. At heavy loads the switching regulator operates in the same manner as Pulse Skip operation at high loads. For applications that can tolerate some output ripple at low output currents, Burst Mode operation provides better efficiency than Pulse Skip at light loads while still providing the full specified output current of the switching regulator. Finally, the switching regulators have an LDO mode that gives a DC option for regulating their output voltages. In LDO mode, the switching regulators are converted to linear regulators and deliver continuous power from their SWx pins through their respective inductors. This mode gives the lowest possible output noise as well as low quiescent current at light loads.
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22
LTC3555 OPERATION
The step-down switching regulators allow mode transition on the fly, providing seamless transition between modes even under load. This allows the user to switch back and forth between modes to reduce output ripple or increase low current efficiency as needed. Step-Down Switching Regulator in Shutdown The step-down switching regulators are in shutdown when not enabled for operation. In shutdown, all circuitry in the step-down switching regulator is disconnected from the switching regulator input supply leaving only a few nanoamperes of leakage current. The step-down switching regulator outputs are individually pulled to ground through a 10k resistor on the switch pins (SW1-SW3) when in shutdown. General Purpose Switching Regulator Dropout Operation It is possible for a switching regulator's input voltage, VINx, to approach its programmed output voltage (e.g., a battery voltage of 3.4V with a programmed output voltage of 3.3V). When this happens, the PMOS switch duty cycle increases until it is turned on continuously at 100%. In this dropout condition, the respective output voltage equals the regulator's input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. Step-Down Switching Regulator Soft-Start Operation Soft-start is accomplished by gradually increasing the peak inductor current for each switching regulator over a 500s period. This allows each output to rise slowly, helping minimize the battery surge current. A soft-start cycle occurs whenever a given switching regulator is enabled, or after a fault condition has occurred (thermal shutdown or UVLO). A soft-start cycle is not triggered by changing operating modes. This allows seamless output operation when transitioning between Forced Burst Mode, Burst Mode, Pulse Skip mode or LDO operation. Step-Down Switching Regulator Switching Slew Rate Control The step-down switching regulators contain new patent pending circuitry to limit the slew rate of the switch node (SWx). This new circuitry is designed to transition the switch node over a period of a couple of nanoseconds, significantly reducing radiated EMI and conducted supply noise. Low Supply Operation The LTC3555 incorporates an undervoltage lockout circuit on VOUT which shuts down the general purpose switching regulators when VOUT drops below VOUTUVLO. This UVLO prevents unstable operation.
APPLICATIONS INFORMATION
CLPROG Resistor and Capacitor As described in the High Efficiency Switching PowerPath Controller section, the resistor on the CLPROG pin determines the average input current limit when the switching regulator is set to either the 1x mode (USB 100mA), the 5x mode (USB 500mA) or the 10x mode. The input current will be comprised of two components, the current that is used to drive VOUT and the quiescent current of the switching regulator. To ensure that the USB specification is strictly met, both components of input current should be considered. The Electrical Characteristics table gives values for quiescent currents in either setting as well as current limit programming accuracy. To get as close to the 500mA or 100mA specifications as possible, a 1% resistor should be used. Recall that IVBUS = IVBUSQ + VCLPROG/RCLPPROG * (hCLPROG +1). An averaging capacitor or an R-C combination is required in parallel with the CLPROG resistor so that the switching regulator can determine the average input current. This network also provides the dominant pole for the feedback loop when current limit is reached. To ensure stability, the capacitor on CLPROG should be 0.47F or larger. Alternatively, faster transient response may be achieved with 0.1F in series with 8.2.
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LTC3555 APPLICATIONS INFORMATION
Choosing the PowerPath Inductor Because the average input current circuit does not measure reverse current (i.e., current from SW to VBUS), current reversal in the inductor at light loads will contribute an error to the average VBUS current measurement. The error is conservative in that if the current reverses, the voltage at CLPROG will be higher than what would represent the actual average input current drawn. The current available for battery charging plus system load is thus reduced but the USB specification will not be violated. This reduction in available VBUS current will happen when the peak-peak inductor ripple is greater than twice the average current limit setting. For example, if the average current limit is set to 100mA, the peak-peak ripple should not exceed 200mA. If the input current is less than 100mA, the measurement accuracy may be reduced. However, this will not affect the average current loop since it will not be in regulation. The LTC3555 includes a current-reversal comparator which monitors inductor current and disables the synchronous rectifier as current approaches zero. This comparator will minimize the effect of current reversal on the average input current measurement. For some low inductance values, however, the inductor current may still reverse slightly. This value depends on the speed of the comparator in relation to the slope of the current waveform, given by VL/L. VL is the voltage across the inductor (approximately -VOUT) and L is the inductance value. An inductance value of 3.3H is a good starting value. The ripple will be small enough for the regulator to remain in continuous conduction at 100mA average VBUS current. At lighter loads the current-reversal comparator will disable the synchronous rectifier for currents slightly above 0mA. As the inductance is reduced from this value, the LTC3555 will enter discontinuous conduction mode at progressively higher loads. Ripple at VOUT will increase directly proportionally to the magnitude of inductor ripple. Transient response, however, will improve. The current mode controller controls inductor current to exactly the amount required by the load to keep VOUT in regulation. A transient load step requires the inductor current to change to a new level. Since inductor current cannot change instantaneously, the capacitance on VOUT delivers or absorbs the difference in current until the inductor current can change to meet the new load demand. A smaller inductor changes its current more quickly for a given voltage drive than a larger inductor, resulting in faster transient response. A larger inductor will reduce output ripple and current ripple, but at the expense of reduced transient performance and a physically larger inductor package size. For this reason a larger CVOUT will be required for larger inductor sizes. The input regulator has an instantaneous peak current clamp to prevent the inductor from saturating during transient load or start-up conditions. The clamp is designed so that it does not interfere with normal operation at high loads and reasonable inductor ripple. It is intended to prevent inductor current runaway in case of a shorted output. The DC winding resistance and AC core losses of the inductor will affect efficiency, and therefore available output power. These effects are difficult to characterize and vary by application. Some inductors that may be suitable for this application are listed in Table 6.
Table 6. Recommended Inductors
INDUCTOR L TYPE (H) LPS4018 3.3
D53LC DB318C WE-TPC Type M1 CDRH6D12 CDRH6D38
MAX IDC (A) 2.2
3.3 3.3 3.3 3.3 3.3
SIZE in mm (L x W x H) MANUFACTURER 3.9 x 3.9 x 1.7 Coilcraft www.coilcraft.com 2.26 0.034 5x5x3 Toko 1.55 0.070 3.8 x 3.8 x 1.8 www.toko.com 1.95 0.065 4.8 x 4.8 x 1.8 Wurth Elektronik www.we-online.com 2.2 0.0625 6.7 x 6.7 x 1.5 Sumida 3.5 0.020 7x7x4 www.sumida.com
MAX DCR () 0.08
VBUS and VOUT Bypass Capacitors The style and value of capacitors used with the LTC3555 determine several important parameters such as regulator control-loop stability and input voltage ripple. Because the LTC3555 uses a step-down switching power supply from VBUS to VOUT, its input current waveform contains high frequency components. It is strongly recommended that a low equivalent series resistance (ESR) multilayer ceramic capacitor be used to bypass VBUS. Tantalum and
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LTC3555 APPLICATIONS INFORMATION
aluminum capacitors are not recommended because of their high ESR. The value of the capacitor on VBUS directly controls the amount of input ripple for a given load current. Increasing the size of this capacitor will reduce the input ripple. To prevent large VOUT voltage steps during transient load conditions, it is also recommended that a ceramic capacitor be used to bypass VOUT. The output capacitor is used in the compensation of the switching regulator. At least 4F of actual capacitance with low ESR are required on VOUT. Additional capacitance will improve load transient performance and stability. Multilayer ceramic chip capacitors typically have exceptional ESR performance. MLCCs combined with a tight board layout and an unbroken ground plane will yield very good performance and low EMI emissions. There are several types of ceramic capacitors available, each having considerably different characteristics. For example, X7R ceramic capacitors have the best voltage and temperature stability. X5R ceramic capacitors have apparently higher packing density but poorer performance over their rated voltage and temperature ranges. Y5V ceramic capacitors have the highest packing density, but must be used with caution because of their extreme non-linear characteristic of capacitance verse voltage. The actual in-circuit capacitance of a ceramic capacitor should be measured with a small AC signal as is expected in-circuit. Many vendors specify the capacitance verse voltage with a 1VRMS AC test signal and as a result, overstate the capacitance that the capacitor will present in the application. Using similar operating conditions as the application, the user must measure or request from the vendor the actual capacitance to determine if the selected capacitor meets the minimum capacitance that the application requires. General Purpose Switching Regulator Inductor Selection Many different sizes and shapes of inductors are available from numerous manufacturers. Choosing the right inductor from such a large selection of devices can be overwhelming, but following a few basic guidelines will make the selection process much simpler. The general purpose step-down converters are designed to work with inductors in the range of 2.2H to 10H. For most applications a 4.7H inductor is suggested for the lower power switching regulators 1 and 2 and 2.2H is recommended for the more powerful switching regulator 3. Larger value inductors reduce ripple current which improves output ripple voltage. Lower value inductors result in higher ripple current and improved transient response time. To maximize efficiency, choose an inductor with a low DC resistance. For a 1.2V output, efficiency is reduced about 2% for 100m series resistance at 400mA load current, and about 2% for 300m series resistance at 100mA load current. Choose an inductor with a DC current rating at least 1.5 times larger than the maximum load current to ensure that the inductor does not saturate during normal operation. If output short circuit is a possible condition, the inductor should be rated to handle the maximum peak current specified for the step-down converters. Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or Permalloy materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. Inductors that are very thin or have a very small volume typically have much higher core and DCR losses, and will not give the best efficiency. The choice of which style inductor to use often depends more on the price vs size, performance and any radiated EMI requirements than on what the LTC3555 requires to operate. The inductor value also has an effect on Forced Burst and Burst Mode operations. Lower inductor values will cause the Burst and Forced Burst Mode switching frequencies to increase. Table 7 shows several inductors that work well with the LTC3555's general purpose regulators. These inductors offer a good compromise in current rating, DCR and physical size. Consult each manufacturer for detailed information on their entire selection of inductors.
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LTC3555 APPLICATIONS INFORMATION
Table 7. Recommended Inductors
INDUCTOR L TYPE (H) DE2818C 4.7 3.3 D312C 4.7 3.3 2.2 DE2812C 4.7 3.3 2.0 CDRH3D16 4.7 3.3 2.2 CDRH2D11 4.7 3.3 2.2 CLS4D09 4.7 SD3118 4.7 3.3 2.2 SD3112 4.7 3.3 2.2 SD12 4.7 3.3 2.2 SD10 4.7 3.3 2.2 LPS3015 4.7 3.3 2.2 *Typical DCR MAX IDC (A) 1.25 1.45 0.79 0.90 1.14 1.2 1.4 1.8 0.9 1.1 1.2 0.5 0.6 0.78 0.75 1.3 1.59 2.0 0.8 0.97 1.12 1.29 1.42 1.80 1.08 1.31 1.65 1.1 1.3 1.5 MAX DCR () 0.072 0.053 0.24 0.20 0.14 0.13* 0.10* 0.067* 0.11 0.085 0.072 0.17 0.123 0.098 0.19 0.162 0.113 0.074 0.246 0.165 0.14 0.117* 0.104* 0.075* 0.153* 0.108* 0.091* 0.2 0.13 0.11 SIZE in mm (L x W x H) 3.0 x 2.8 x 1.8 3.0 x 2.8 x 1.8 3.6 x 3.6 x 1.2 3.6 x 3.6 x 1.2 3.6 x 3.6 x 1.2 3.0 x 2.8 x 1.2 3.0 x 2.8 x 1.2 3.0 x 2.8 x 1.2 4 x 4 x 1.8 4 x 4 x 1.8 4 x 4 x 1.8 3.2 x 3.2 x 1.2 3.2 x 3.2 x 1.2 3.2 x 3.2 x 1.2 4.9 x 4.9 x 1 3.1 x 3.1 x 1.8 3.1 x 3.1 x 1.8 3.1 x 3.1 x 1.8 3.1 x 3.1 x 1.2 3.1 x 3.1 x 1.2 3.1 x 3.1 x 1.2 5.2 x 5.2 x 1.2 5.2 x 5.2 x 1.2 5.2 x 5.2 x 1.2 5.2 x 5.2 x 1.0 5.2 x 5.2 x 1.0 5.2 x 5.2 x 1.0 3.0 x 3.0 x 1.5 3.0 x 3.0 x 1.5 3.0 x 3.0 x 1.5 MANUFACTURER Toko www.toko.com
ideal for use in height-restricted designs. Table 8 shows a list of several ceramic capacitor manufacturers.
Table 8. Recommended Ceramic Capacitor Manufacturers
AVX Murata Taiyo Yuden Vishay Siliconix TDK Sumida www.sumida.com www.avxcorp.com www.murata.com www.t-yuden.com www.vishay.com www.tdk.com
Over-Programming the Battery Charger The USB high power specification allows for up to 2.5W to be drawn from the USB port (5V x 500mA). The PowerPath switching regulator transforms the voltage at VBUS to just above the voltage at BAT with high efficiency, while limiting power to less than the amount programmed at CLPROG. In some cases the battery charger may be programmed (with the PROG pin) to deliver the maximum safe charging current without regard to the USB specifications. If there is insufficient current available to charge the battery at the programmed rate, the PowerPath regulator will reduce charge current until the system load on VOUT is satisfied and the VBUS current limit is satisfied. Programming the battery charger for more current than is available will not cause the average input current limit to be violated. It will merely allow the battery charger to make use of all available power to charge the battery as quickly as possible, and with minimal power dissipation within the battery charger. Alternate NTC Thermistors and Biasing The LTC3555 provides temperature qualified charging if a grounded thermistor and a bias resistor are connected to NTC. By using a bias resistor whose value is equal to the room temperature resistance of the thermistor (R25) the upper and lower temperatures are pre-programmed to approximately 40C and 0C, respectively (assuming a Vishay "Curve 1" thermistor). The upper and lower temperature thresholds can be adjusted by either a modification of the bias resistor value or by adding a second adjustment resistor to the circuit. If only the bias resistor is adjusted, then either the upper or the lower threshold can be modified but not both. The other trip point will be determined by the characteristics
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Cooper www.cooperet.com
Coil Craft www.coilcraft.com
General Purpose Switching Regulator Input/Output Capacitor Selection Low ESR (equivalent series resistance) MLCC capacitors should be used at both switching regulator outputs as well as at each switching regulator input supply (VINX). Only X5R or X7R ceramic capacitors should be used because they retain their capacitance over wider voltage and temperature ranges than other ceramic types. A 10F output capacitor is sufficient for most applications. For good transient response and stability the output capacitor should retain at least 4F of capacitance over operating temperature and bias voltage. Each switching regulator input supply should be bypassed with a 1F capacitor. Consult with capacitor manufacturers for detailed information on their selection and specifications of ceramic capacitors. Many manufacturers now offer very thin (<1mm tall) ceramic capacitors
26
LTC3555 APPLICATIONS INFORMATION
of the thermistor. Using the bias resistor in addition to an adjustment resistor, both the upper and the lower temperature trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. Examples of each technique are given below. NTC thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. The Vishay-Dale thermistor NTHS0603N011-N1003F, used in the following examples, has a nominal value of 100k and follows the Vishay "Curve 1" resistance-temperature characteristic. In the explanation below, the following notation is used. R25 = Value of the Thermistor at 25C RNTC|COLD = Value of thermistor at the cold trip point RNTC|HOT = Value of the thermistor at the hot trip point rCOLD = Ratio of RNTC|COLD to R25 rHOT = Ratio of RNTC|COLD to R25 RNOM = Primary thermistor bias resistor (see Figure 5a) R1 = Optional temperature range adjustment resistor (see Figure 5b)
VBUS VBUS LTC3555 NTC BLOCK
The trip points for the LTC3555's temperature qualification are internally programmed at 0.349 * VBUS for the hot threshold and 0.765 * VBUS for the cold threshold. Therefore, the hot trip point is set when: RNTCHOT | RNOM + RNTCHOT | * VBUS = 0.349 * VBUS
and the cold trip point is set when: RNTC|COLD RNOM + RNTC|COLD * VBUS = 0.765 * VBUS
Solving these equations for RNTC|COLD and RNTC|HOT results in the following: RNTC|HOT = 0.536 * RNOM and RNTC|COLD = 3.25 * RNOM By setting RNOM equal to R25, the above equations result in rHOT = 0.536 and rCOLD = 3.25. Referencing these ratios to the Vishay Resistance-Temperature Curve 1 chart gives a hot trip point of about 40C and a cold trip point of about 0C. The difference between the hot and cold trip points is approximately 40C.
VBUS VBUS LTC3555 NTC BLOCK
RNOM 100k NTC 3 RNTC 100k
0.765 * VBUS
-
TOO_COLD
RNOM 105k NTC 3
0.765 * VBUS
-
TOO_COLD
+
+
T
-
TOO_HOT 0.349 * VBUS
R1 12.7k 0.349 * VBUS T RNTC 100k
-
TOO_HOT
+
+
+
NTC_ENABLE 0.1V
+
NTC_ENABLE 0.1V
-
3555 F05a
-
3555 F05b
(5a) Figure 5. NTC Circuits
(5b)
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LTC3555 APPLICATIONS INFORMATION
By using a bias resistor, RNOM, different in value from R25, the hot and cold trip points can be moved in either direction. The temperature span will change somewhat due to the non-linear behavior of the thermistor. The following equations can be used to easily calculate a new value for the bias resistor: RNOM = RNOM = rHOT * R25 0.536 rCOLD * R25 3.25 USB Inrush Limiting When a USB cable is plugged into a portable product, the inductance of the cable and the high-Q ceramic input capacitor form an L-C resonant circuit. If the cable does not have adequate mutual coupling or if there is not much impedance in the cable, it is possible for the voltage at the input of the product to reach as high as twice the USB voltage (~10V) before it settles out. In fact, due to the high voltage coefficient of many ceramic capacitors, a nonlinearity, the voltage may even exceed twice the USB voltage. To prevent excessive voltage from damaging the LTC3555 during a hot insertion, it is best to have a low voltage coefficient capacitor at the VBUS pin to the LTC3555. This is achievable by selecting an MLCC capacitor that has a higher voltage rating than that required for the application. For example, a 16V, X5R, 10F capacitor in a 1206 case would be a better choice than a 6.3V, X5R, 10F capacitor in a smaller 0805 case. Alternatively, the following soft connect circuit (Figure 6) can be employed. In this circuit, capacitor C1 holds MP1 off when the cable is first connected. Eventually C1 begins to charge up to the USB input voltage applying increasing gate support to MP1. The long time constant of R1 and C1 prevent the current from building up in the cable too fast thus dampening out any resonant overshoot.
MP1 Si2333 C1 100nF USB CABLE R1 40k C2 10F VBUS
where rHOT and rCOLD are the resistance ratios at the desired hot and cold trip points. Note that these equations are linked. Therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the IC. Consider an example where a 60C hot trip point is desired. From the Vishay Curve 1 R-T characteristics, rHOT is 0.2488 at 60C. Using the above equation, RNOM should be set to 46.4k. With this value of RNOM, the cold trip point is about 16C. Notice that the span is now 44C rather than the previous 40C. This is due to the decrease in "temperature gain" of the thermistor as absolute temperature increases. The upper and lower temperature trip points can be independently programmed by using an additional bias resistor as shown in Figure 5b. The following formulas can be used to compute the values of RNOM and R1: r -r RNOM = COLD HOT * R25 2.714 R1 = 0.536 * RNOM - rHOT * R25 For example, to set the trip points to 0C and 45C with a Vishay Curve 1 thermistor choose: RNOM = 3.266 - 0.4368 * 100k = 104.2k 2.714
5V USB INPUT
LTC3555
GND
3555 F06
Figure 6. USB Soft Connect Circuit
Printed Circuit Board Layout Considerations In order to be able to deliver maximum current under all conditions, it is critical that the Exposed Pad on the backside of the LTC3555 package be soldered to the PC board ground. Failure to make thermal contact between the Exposed Pad on the backside of the package and the copper board will result in higher thermal resistances.
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the nearest 1% value is 105k: R1 = 0.536 * 105k - 0.4368 * 100k = 12.6k the nearest 1% value is 12.7k. The final solution is shown in Figure 5b and results in an upper trip point of 45C and a lower trip point of 0C.
28
LTC3555 APPLICATIONS INFORMATION
Furthermore, due to its high frequency switching circuitry, it is imperative that the input capacitors, inductors and output capacitors be as close to the LTC3555 as possible and that there be an unbroken ground plane under the LTC3555 and all of its external high frequency components. High frequency currents, such as the VBUS, VIN1, VIN2 and VIN3 currents on the LTC3555, tend to find their way along the ground plane in a myriad of paths ranging from directly back to a mirror path beneath the incident path on the top of the board. If there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits. If high frequency currents are not allowed to flow back through their natural least-area path, excessive voltage will build up and radiated emissions will occur. There should be a group of vias under the grounded backside of the package leading directly down to an internal ground plane. To minimize parasitic inductance, the ground plane should be on the second layer of the PC board. The GATE pin for the external ideal diode controller has extremely limited drive current. Care must be taken to minimize leakage to adjacent PC board traces. 100nA of leakage from this pin will introduce an offset to the 15mV ideal diode of approximately 10mV. To minimize leakage, the trace can be guarded on the PC board by surrounding it with VOUT connected metal, which should generally be less that one volt higher than GATE. When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3555. 1. Are the capacitors at VBUS, VIN1, VIN2 and VIN3 as close as possible to the LTC3555? These capacitors provide the AC current to the internal power MOSFETs and their drivers. Minimizing inductance from these capacitors to the LTC3555 is a top priority. 2. Are COUT and L1 closely connected? The (-) plate of COUT returns current to the GND plane. 3. Keep sensitive components away from the SW pins. Battery Charger Stability Considerations The LTC3555's battery charger contains both a constantvoltage and a constant-current control loop. The constantvoltage loop is stable without any compensation when a battery is connected with low impedance leads. Excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1F from BAT to GND. Furthermore, when the battery is disconnected, a 4.7F capacitor in series with a 0.2 to 1 resistor from BAT to GND is required to keep ripple voltage low. High value, low ESR multilayer ceramic chip capacitors reduce the constant-voltage loop phase margin, possibly resulting in instability. Ceramic capacitors up to 22F may be used in parallel with a battery, but larger ceramics should be decoupled with 0.2 to 1 of series resistance. In constant-current mode, the PROG pin is in the feedback loop rather than the battery voltage. Because of the additional pole created by any PROG pin capacitance, capacitance on this pin must be kept to a minimum. With no additional capacitance on the PROG pin, the battery charger is stable with program resistor values as high as 25k. However, additional capacitance on this node reduces the maximum allowed program resistor. The pole frequency at the PROG pin should be kept above 100kHz. Therefore, if the PROG pin has a parasitic capacitance, CPROG, the following equation should be used to calculate the maximum resistance value for RPROG: RPROG 1 2 * 100kHz * CPROG
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Figure 7. Higher Frequency Ground Currents Follow Their Incident Path. Slices in the Ground Plane Cause High Voltage and Increased Emissions
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29
LTC3555 TYPICAL APPLICATION
Watchdog Microcontroller Operation
L1 3.3H
USB/WALL 4.5V TO 5.5V
25 C1 10F 100k 3 20 T 2k 8.2 0.1F 3k 2
VBUS NTC PROG CLPROG
SW VOUT GATE BAT GND CHRG
26 24 22 23
TO OTHER LOADS MP1 C2 22F RED 510
+
29 21 L2 4.7H
Li-Ion
SW1 1 1F 8
17 19
3.3V 400mA 1.02M 10pF 324k 10F 1F
MEMORY
LDO3V3 DVCC
FB1
PUSH BUTTON MICROCONTROLLER
VIN1 LTC3555 SW2 FB2 2 9,10 I 2C
18 L3 4.7H 1.02M 10pF 365k 5 L4 2H 715k 10pF 806k 11 15
3555 TA02
6 4
1.61V TO 3.03V 400mA
I/O
10F 1F
MICROPROCESSOR
C1: MURATA GRM21BR61A106KE19 C2: TDK C2012X5R0J226M L1: COILCRAFT LPS4018-332LM L2, L3: TOKO 1098AS-4R7M L4: TOKO 1098AS-2R0M MP1: SILICONIX Si2333 16 7 13 27 28 EN1 EN2 EN3 ILIM0 ILIM1
VIN2 SW3 FB3
12 14
0.8V TO 1.51V 1A
CORE POR
22F 2.2F
10k
VIN3 RST3
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30
LTC3555 PACKAGE DESCRIPTION
UFD Package 28-Lead Plastic QFN (4mm x 5mm)
(Reference LTC DWG # 05-08-1712 Rev B)
0.70 0.05
4.50 0.05 3.10 0.05 2.50 REF 2.65 0.05 3.65 0.05
PACKAGE OUTLINE
0.25 0.05 0.50 BSC 3.50 REF 4.10 0.05 5.50 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 0.10 (2 SIDES) 0.75 0.05 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.35 x 45 CHAMFER 27 28 0.40 0.10 1 2 5.00 0.10 (2 SIDES)
2.50 REF R = 0.115 TYP
PIN 1 TOP MARK (NOTE 6)
3.50 REF 3.65 0.10 2.65 0.10
(UFD28) QFN 0506 REV B
0.200 REF 0.00 - 0.05
0.25 0.05 0.50 BSC BOTTOM VIEW--EXPOSED PAD
NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
31
LTC3555 TYPICAL APPLICATION
Push Button Start with Automatic Sequencing, Reverse Input Voltage Protection and 10 Second Push and Hold Hard Shutdown
USB CONNECTOR MP1 25 17 19 VBUS SW1 FB1 8 0.1F RST3 1 4.7k 1k 1F LTC3555 FB3 1M MN1 10F 10F 10k 27 28 ILIM0 ILIM1 FB2 4 SEND I2C CODE: "0x12FF04" ONCE POWER IS DETECTED MN1: 2N7002 MP1: SILICONIX Si2333DS
3555 TA03
MEMORY
DVCC 15 7 12 14 CORE
LDO3V3
EN2 SW3
13
EN3 SDA SCL I/O
I2C EN1 SW2
9,10 16 6
2
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32 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0507 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007

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